(a) Field of the Invention
The present invention relates to a sigma-delta modulator (SDM) used in an analog-to-digital converter (ADC) and, more particularly, to a digital feedforward SDM having a feedforward path and a modulation method thereof.
(b) Description of the Related Art
A digital feedforward signal-delta modulator (SDM) used in an analog-to-digital converter (ADC) and other applications is well known in this field. Because such an SDM is easily implemented by using a CMOS process without requiring precise components, it is commonly used especially in an analog-to-digital converter (ADC) or the like.
FIG. 1 is a schematic block diagram showing the structure of the related art discrete time feedforward SDM.
As shown in FIG. 1, in the related art discrete time feedforward SDM, the an analog input signal and analog outputs from integrators 10-1, 10-2, . . . , 10-n are multiplied by coefficients b0, b1, b2, . . . , bn by multipliers 20-0, 20-1, 20-2, . . . , 20-n, which are then inputted to an analog adder 30. The analog adder 30 adds up the analog signals inputted from the multipliers 20-0, 20-1, 20-2, . . . , 20-n and outputs an analog added signal. The analog added signal outputted from the analog adder 30 is quantized by a quantizer 40, so as to be outputted as a digital output signal. The digital output signal outputted from the quantizer 40 is converted into an analog signal by a digital-to-analog converter (DAC) 50 so as to be fed back, to which a coefficient a1 is applied by a multiplier 60 so as to be outputted as an analog signal. The analog input signal is subtracted by the analog signal fed back from the multiplier 60 by a subtractor 70, which is then inputted to the integrator 10-1.
With reference to FIG. 1, in the related art discrete time feedforward SDM, the part from the quantizer 40 to the DAC 50 is a digital domain, while the other part, namely, from the analog input signal to the analog adder 30 and from the multiplier 60 to the subtractor 70 is an analog domain.
Thus, the related art discrete time feedforward SDM requires an analog adding circuit such as the analog adder 30 in order to add up the analog signals, and in general, a high speed signal processing is required in the analog adding circuit.
FIG. 2 is a schematic block diagram showing the structure of the related art continuous time feedforward SDM.
As shown in FIG. 2, the related art continuous time feedforward SDM has a very similar structure to that of the discrete time feedforward SDM illustrated in FIG. 1. Thus, the same reference numerals will be used for the same elements as those illustrated in FIG. 1.
The continuous time feedforward SDM illustrated in FIG. 2 additionally includes elements 80 and 90 for correcting an excess loop delay besides the elements 10-1, 10-2, . . . , 10-n, 20-0, 20-1, 20-2, . . . , 20-n, 30, 40, 50, 60, and 70 of the related art discrete time feedforward SDM illustrated in FIG. 1. Namely, a digital output signal outputted from the quantizer 40 is converted into an analog signal by a DAC 80, to which a coefficient a2 is multiplied by the multiplier 90 so as to be outputted as an analog signal, and the analog signal is outputted to the analog adder 30 so as to be applied as a subtraction value. Namely, the analog adder 30 illustrated in FIG. 1 adds up only the analog signals outputted from the multipliers 20-0, 20-1, 20-2, . . . , 20-n, while the analog adder 30 illustrated in FIG. 2 adds up all the analog signals outputted from the multipliers 20-0, 20-1, 20-2, . . . , 20-n, subtracts an analog signal, which has been converted from a digital output signal outputted from the quantizer 40, weighted, and fed back, from the added analog signal and then outputs the resultant signal to the quantizer.
With reference to FIG. 2, the part from the quantizer 40 to the DACs 50 and 80 is a digital domain, and the other part, namely, from the analog input signal to the analog adder 30, from the multiplier 60 to the subtractor 70, and from the multiplier 90 to the analog adder 30, is an analog domain.
Thus, the related art continuous time feedforward SDM also requires an analog adding circuit such as the analog adder 30 in order to add up the analog signals, and in general, a high speed signal processing is required in such an analog adding circuit. Also, it is noted that, the related art continuous time feedforward SDM additionally uses the DAC 80 for converting the digital output signal to the analog signal in order to correct the excess loop delay.
The above information disclosed in this Background section is only for enhancement of understanding of the background of the invention and therefore it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art.